17th INTERNATIONAL FORUM ON MPSoC
for software-defined hardware
For further information, please send email to Frédéric Pétrot
Osaka University, Japan
Reliable multiprocessor system for low voltage MPSoC
Nowadays, operating voltage of systems becomes lower and lower. High performance but low power systems are conducted under very low supply voltage in order to achieve low power operation. However, in these low supply voltage situation, power noise by the power supply fluctuation is not negligible. This talk introduces low voltage MPSoC system design considering power noise by peak supply current to the system.
He is an associate Professor of Graduate School of Information Science and Technology at Osaka University. He received his B.E., M.E. and Dr. Eng. degrees from Tokyo Institute of Technology in 1987, 1989 and 1992, respectively. From 1996, he has been with the Osaka University. He was a visiting scholar in University of California, Irvine from 2006 to 2007. His research interests include System Level Design, VLSI design and VLSI CAD. He is a member of ACM, and Computer, CAS, SSC, and SP Society of IEEE.